Overview

Sheet1
Sheet2
Sheet4
Sheet5
Sheet3

Sheet 1: Sheet1
AC pin assignments, groupings and logic options 6/11/05 Y.Okayasu
Reset NIMI0

































Detector ID Input ch. (ECLI) Output ch.(ECLO) Detector ID in TUL 6 segments 4 segments 3 segments 2 segments
Rayer 1































AC1-07T 12 0 AC1-01































AC1-07B 13































AC1-06T 10 1 AC1-02































AC1-06B 11































AC1-05T 8 2 AC1-03































AC1-05B 9































AC1-04T 6 3 AC1-04































AC1-04B 7































AC1-03T 4 4 AC1-05































AC1-03B 5































AC1-02T 2 5 AC1-06































AC1-02B 3































AC1-01T 0 6 AC1-07































AC1-01B 1































Rayer 2































AC2-07T 26 7 AC2-01































AC2-07B 27































AC2-06T 24 8 AC2-02































AC2-06B 25































AC2-05T 22 9 AC2-03































AC2-05B 23































AC2-04T 20 10 AC2-04































AC2-04B 21































AC2-03T 18 11 AC2-05































AC2-03B 19































AC2-02T 16 12 AC2-06































AC2-02B 17































AC2-01T 14 13 AC2-07































AC2-01B 15































Rayer 3
































AC3-07T 40 14 AC3-01































AC3-07B 41































AC3-06T 38 15 AC3-02































AC3-06B 39































AC3-05T 36 16 AC3-03































AC3-05B 37































AC3-04T 34 17 AC3-04































AC3-04B 35































AC3-03T 32 18 AC3-05































AC3-03B 33































AC3-02T 30 19 AC3-06































AC3-02B 31































AC3-01T 28 20 AC3-07































AC3-01B 29
































Output NIMO
0 1 2 3 4 5 6 7 0 1 2 3

6 7 0 1 2


6 7 0 1



6 7

ECLO
21 22 23 24 25 26

21 22 23 24



21 22 23




21 22





Default : (top x bottom)



































































NIMO0-5, ECLO21-26































* layer1 + layer2 + layer3

R.S.# = 0 (6 segments), 1 (4 segments), 2 ( 3 segments), 3 (2 segments)

* (layer1 x layer2) + (layer2 x layer3) + (layer3 x layer1)

R.S.# = 4 (6 segments), 5 (4 segments), 6 (3 segments), 7 (2 segments)

* layer1 x layer2 x layer3

R.S.# = 8 (6 segments), 9 (4 segments), A (3 segments), B (2 segments)





































NIMO6,7


































R.S.# = 0, 1, 2, 3 : unsegmented layer1 + layer2 + layer3

R.S.# = 4, 5, 6, 7 : unsegmented (layer1 x layer2) + (layer2 x layer3) + (layer3 x layer1)

R.S.# = 8, 9, A, B : unsegmented layer1 x layer2 x layer3

R.S.# = F : unsegmented layer1 + layer2 + layer3 of the (top + bottom)





































outputs unsynchronized w/ internal clock .



























outputs synchronized w/ internal clock .































































Output signal width :





















ECLO (top x bottom) --> 40 ns





















ECLO21-26 --> 120 ns





















NIMO0-5 --> 120 ns





















NIMO6, 7 --> 40 ns





















Sheet 2: Sheet2
WC pin assignments, groupings and logic options 6/11/05 Y.Okayasu
Reset NIMI0

































Detector ID Input ch. (ECLI) Output ch.(ECLO) Detector ID in TUL 6 segments 4 segments 3 segments 2 segments
Rayer 1































WC1-12T 38 0 WC1-01