1 saw 1.1 % Hall C Howto Template
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16
17 \documentclass{chowto}
18
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23 saw 1.1 \date{July 8, 2003}
24 \begin{document}
25
26 \begin{abstract}
27 A brief description of the electronic configuration of Hall A/C target
28 raster systems and trouble shooting procedure are summarized for the
29 use of professional maintenance staffs.
30 \end{abstract}
31
32 \section{Driver Module Identification}
33
34 \[
35 \begin{tabular}{llll}
36 ID &Owner &Frequency (kHz) &Status\\
37 & & & \\
38 $\#$1 &Hall C &24.96 &in operation\\
39 $\#$2 &Hall C &25.08 &in operation\\
40 & & & \\
41 $\#$3 &Hall C &24.96 &spare \\
42 $\#$4 &Hall C &25.08 &spare \\
43 & & & \\
44 saw 1.1 $\#$5 &Hall A &24.96 &spare \\
45 $\#$6 &Hall A &25.08 &spare \\
46 & & & \\
47 $\#$7 &Hall A &24.96 &in operation\\
48 $\#$8 &Hall A &25.08 &in operation
49 \end{tabular}
50 \]
51
52 \section{Description of Front Panel}
53
54 \begin{itemize}
55 \item{AC switch}
56 \item{AC power indicator (LED)}
57 \item{Fuse - 120V, 10A}
58 \item{AC line receptacle with EMI filter}
59 \item{9 pin D-sub socket, RS232 for EPICS}
60 \item{9 pin D-sub socket, for Manual controller}
61 \item{BNC, FR sync TTL output}
62 \item{BNC, Helicity (MPS) input}
63 \item{50A Supercon pin receptacles, FR magnet terminals}
64 \item{BNC, Pearson 411 current monitor output}
65 saw 1.1 \item{BNC, LEM probe output}
66 \end{itemize}
67
68
69 \section{Module Internal Configuration}
70
71
72 \subsection{H-Bridge}
73
74 The diagonal 2 by 2 power switch consists of 8 HEXAFETs (FA57SA50LS).
75 Two of them are parallel. 4 snubber capacitors (MP88 2.5$\mu$F/800V,
76 metalized polypropylene film) are connection between the common source
77 and common drain of upper and lower HEXAFETs to eliminate spikes.
78
79
80 \subsection{Energy Storage Capacitors}
81
82 Two 165$\mu$F 600VDC Capacitors (Unlytic UL30, Electronic Concepts)
83 are connected across upper-left common source and upper-right common
84 drain. Other two are connected across lower-left common drain and
85 lower-right common source. These four capacitors are used to store
86 saw 1.1 energy pumped from UltraVolt high voltage power supply to keep a
87 stable HV level (~ 1$\%$) at 25 kHz raster frequency under full load.
88
89
90 \subsection{H-Bridge Driver}
91
92 Two driver boards directly connect upper and lower rows of HEXAFETs.
93 Each driver board consists of 4 separated drivers (Max 4429MJA),
94 and each driver drives a single HEXAFET. The input stage of driver
95 is formed by opto-coupler (HCPL7710). A FLOATING 15V voltage generated
96 by Polytron SWU0.75-5S DC/DC converter from 5V, powers the drivers.
97
98 \subsection{H-Bridge Control Waveform Generator}
99
100 An external trigger signal comes from J1 BNC. A Retriggerable one-shot
101 74HCT123 has a time constant 0.22 ms. If there is no external trigger
102 signal during 0.22 ms, the circuit automatically switches to the internal
103 crystal oscillator. If a trigger signal comes during 0.22 ms, the
104 generator is controlled by external trigger.
105
106 From raster frequency input the 74HCT4046A phase-lock loop generates
107 saw 1.1 8 $f_0$ synchronized signals. Control waveforms are produced by 161
108 counters and synthesis logic at OUTA and OUTB. A sync signal signal is
109 also produced at line driver max4429.
110
111
112 \subsection{HV Power Supply Input/Output Controller}
113
114 The circuit receives analog voltage control and current signals from
115 either PIC/ADIO EPICS interface or manual controller to generate HV
116 control signal and voltage/current readback signals. The circuit gets
117 PIC/ADIO and manual controller operating in parallel but only executes
118 the larger value setting from them.
119
120
121 \subsection{UltraVolt Switching HV Power Supply}
122
123 The UltraVolt 1/2 C24 - P250 switching HV DC/DC converter (250 W, 500V)
124 is used to power H-bridge. Its internal voltage reference is + 5 V.
125 It needs a previous 24 V DC power supply. The 14 pin Molex connector
126 gives following control signal connections:
127
128 saw 1.1 \begin{itemize}
129 \item{pin $\#$3 - Output current monitoring}
130 \item{pin $\#$14 - Output voltage monitoring}
131 \item{pin $\#$4 - Enable/disable control}
132 \item{pin $\#$6 - Control voltage input}
133 \item{pin $\#$5 - Ground}
134 \end{itemize}
135
136 The operational status of HV unit is displayed on FR EPICS control screen.
137 For all 8 modules in normal operation, the average voltage reading and
138 corresponding current reading are shown in the following table :
139
140 \[
141 \begin{tabular}{lrrrrrrr}
142 Voltage in V & 50 & 100 & 150 & 200 & 250 & 300 & 350\\
143 Current in mA & 54 & 82 & 108 & 133 & 160 & 187 & 215\\
144 \end{tabular}
145 \]
146
147 The readout values on EPICS screen should be consistent with the display of
148 manual controller.
149 saw 1.1
150
151 \subsection{HV Safety Protection}
152
153 A Sumida mercury-wetted Reed relay with a 10W 10 kohm resistor are connected
154 in series. The two terminals are connected to storage capacitors in parallel.
155 The Reed relay is open in normal, as power interruption occurs Reed relay
156 closed and HV discharges through 1 kohm resistor.
157
158
159 \subsection{PIC/Adio Board}
160
161 PIC/Adio board is provided by Fast Electronics Group as the interface
162 between UltraVolt HV unit and EPICS control. It executes high voltage
163 setting, voltage/current readback, logic control display. Parallel to
164 manual controller, PIC/ADIO board gives EPICS control full information
165 about the status of the module.
166
167
168 \section{External Auxiliary Electronics}
169
170 saw 1.1
171 \subsection{Field Pickup Integrator}
172
173 Each target raster magnet is equipped with a pick-up coil at the center
174 of magnet winding plane. The field pickup integrator converts the induced
175 voltage signals into linear waveform and adjusts the amplitude of linear
176 signals to the same amplitude of output of Pearson current probe.
177
178
179 \subsection{Helicity Synchronization Unit}
180
181 This optional NIM module unit is designed for the use of G$_{0}$
182 experiment. Hall A has already preserved such capability for future's
183 application. The unit receives trigger signal from helicity reverse (MPS).
184 A phase-lock circuit generates two correlated raster frequency signals.
185 It enables the rastered beam starts at the exact same time of MPS.
186 Therefore, the instant beam positions are always the same for each MPS.
187
188
189 \subsection{On-line Raster Pattern Display ADC and Trigger Generator}
190
191 saw 1.1 A Jorgger 4-channel VME ADC has been shared by Hall C and Hall A two
192 raster systems. The trigger generator produces 60 Hz synchronization
193 signals from one raster frequency as the trigger of ADC. The 2D and
194 3D raster pattern display software was written by Chris Slominski.
195 By pushing control button on EPICS control screen, users could
196 observe raster 2D and 3D pattern on-line.
197
198
199
200 \subsection{BRM/FSD system}
201
202 It has the same function as of BRM/FSD system of old raster system. It
203 takes analog magnet current signals to compare the calculated current
204 amplitude value from beam energy and raster size. Fault warning signal
205 will be given as soon as a discrepancy occurs.
206
207
208
209 \section{In Site Trouble Shooting Procedure}
210
211 \subsection{Visual Diagnostics}
212 saw 1.1
213
214 \begin{itemize}
215 \item{Verify the 2D FR pattern on the scope in Hall A/Hall C counting house}
216 \item{Verify the 2D and 3D on-line pattern display on EPICS screen}
217 \item{Verify voltage and current readback on front panel of manual controller}
218 \item{Verify the module status on EPICS control screen}
219 \end{itemize}
220
221 \subsection{Check Cable Connection}
222
223 Start from the scope cable in counting house, the signal channel waveform
224 should be linear (triangular). If a distorted waveform observed, check the
225 input analog cables. Bad cable connection could cause such distortion.
226
227
228 \subsection{Module Quick Check}
229
230 After the two steps previous check, if problem is still existing, ask
231 for an entry to open the door of lead shielding cave. Use scope to look
232 at LEM output. In case of either high level offset or asymmetric waveform
233 saw 1.1 observed, determine to replace the module because that indicates the
234 core part of H-bridge is defect.
235
236
237 \section{Maintenance in Laboratory}
238 In most case if H-bridge failure was detected by diagnostics, it is
239 impossible to fix on site because the complicated mechanical structure
240 inside the power module. The defect module should be taken back to
241 laboratory for necessary inspection and repair.
242
243
244 \subsection{Assembly and Disassembly Procedure}
245
246 \begin{itemize}
247 \item{Dismount the rear panel (heatsink) from module by Hexascrew driver
248 1/8"}
249 \item{Dismount the driver boards by using far-screw holes}
250 \item{Unscrew the copper bus strips over the bridge}
251 \item{Disconnect the short wire - first the gate, then the source}
252 \item{Screw the copper bus strips again}
253 \end{itemize}
254 saw 1.1
255 \subsection{HV I/O Controller Adjustment}
256
257 \subsubsection{Potentiometer Identification}
258
259 \begin{itemize}
260 \item{VR1 - HV output current adjustment}
261 \item{VR3 - Current display adjustment}
262 \item{VR2 - HV voltage limit adjustment}
263 \item{VR4 - Voltage value display adjustment}
264 \end{itemize}
265
266 \subsubsection{Install the Maximum HV Value}
267
268 Turn the multi-turn potentiometer on the front panel of manual
269 controller to the right end to set the maximum voltage value of HV output.
270
271 \subsubsection{Setup high voltage limit}
272 Adjust VR2 to set the maximum voltage display on manual controller = 360 V
273
274 \subsubsection{High Voltage Current adjustment}
275 saw 1.1
276 \begin{itemize}
277 \item{Take P$_{2}$ connector away from Molex 4 position 90 degree
278 socket on Control Waveform Generator board in order to switch
279 the H-Bridge is off}
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282 saw 1.1 multimeter to current measurement. Then, connect them to HV
283 power supply output (copper bus strips), the only load of HV
284 unit is the 250 ohm resistor.}
285 \item{Measure voltage value at pin $\#$8 of J6 of the HV I/O board
286 (current monitoring readout) by the second multi-meter. For
287 convenience, one can measure the terminal $\#$41 on PIC/ADIO
288 board. Adjust VR1 to make the second multi-meter readout being
289 the same value with the first meter. 0pin $\#$8 the same value with
290 multi-meter readout.}
291 \item{Adjust VR3 to make displayed current value of manual
292 controller the same with multi-meter readout.}
293 \end{itemize}
294
295 \subsubsection{Voltage Calibration}
296 \begin{itemize}
297 \item{Use multimeter to measure HV directly}
298 \item{Set multi-turn potentiometer a fixed position, for example 84.5}
299 \item{Adjust VR2 to set the control voltage the same with multimeter}
300 \item{Adjust VR4 to set the displayed voltage value on the manual
301 controller front panel the same value with multimeter readout.}
302 \end{itemize}
303 saw 1.1
304
305 \subsubsection{LEM Probe Offset Adjustment}
306
307 In normal condition, a small DC offset appears on the zero-crossing
308 line of H-Bridge output current waveform. It comes from tiny time
309 difference of the diagonal shoulders. Adjust delay time by turning
310 VR4 (2k ohm potentiometer) on Control Waveform Generator Board to
311 minimize the DC offset at LEM output waveform.
312
313
314 \subsection{Individual HEXAFET Inspection}
315
316 After disassembly of H-bridge from heatsink, multi-meter can used to
317 measure the resistance value between the drain and source. Normal
318 value of resistance should be 1.5 - 2.2 M ohm. Less value indicates
319 the HEXAFET was damaged.
320
321
322 \subsection{Driver Board Inspection}
323
324 saw 1.1 Disconnect driver boards from H-Bridge. Keep input cables connected
325 with control waveform generator. Use central needle of scope high
326 impedance probe connecting output of each driver. The corresponding
327 ground crocodile should connect each floating ground terminal.
328
329 The driver output should appear good leading edge and fall edge as
330 well as top flatness. Both rise time and fall time should less than
331 10 ns at zero load. When driver is connected with capacitive load
332 such as 10 nF (10,000 pF), both leading and fall edges become much
333 slower like 50 ns at $\pm$ 15 V power supply voltage in the same
334 amplitude. It is normal. If the slowdown of leading and fall edges
335 is much larger than this value, it indicates defect of the driver.
336
337
338 \end{document}
339
340 % Revision history:
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