Pin Plan of v1495
Note: Please go through the nomenclature conventions to follow this section clearly.
While programming the firmware, the Pin plan has been assumed. All signals unless otherwise specified are LVDS.
Slave board
Slave-1: The A, B, D and E ports take LVDS, 32 bit input signal information from the top 32 strips of planes 1, 2, 3 and 4 respectively.
Pin 1 is indicated by a white arrow on the port of v1495. The pattern in which signals are given into the pins are as follows:
| pin #: DD strip # | pin #: DD strip # |
|---|---|
| A(32): strip 32 | A(16): strip 31 |
| A(31): strip 30 | A(15): strip 29 |
| A(30): strip 28 | A(14): strip 27 |
| A(29): strip 26 | A(13): strip 25 |
| A(28): strip 24 | A(12): strip 23 |
| A(27): strip 22 | A(11): strip 21 |
| A(26): strip 20 | A(10): strip 19 |
| A(25): strip 18 | A(9): strip 17 |
| A(24): strip 16 | A(8): strip 15 |
| A(23): strip 14 | A(7): strip 13 |
| A(22): strip 12 | A(6): strip 11 |
| A(21): strip 10 | A(5): strip 9 |
| A(20): strip 8 | A(4): strip 7 |
| A(19): strip 6 | A(3): strip 5 |
| A(18): strip 4 | A(2): strip 3 |
| A(16): strip 2 | A(1): strip 1 |
The B, D and E follow the exact same pattern as A port.
The C-port outputs to Master board
C(0): the overall good-trigger decision based on the signal from this cluster of 32 strips.
C(1)-C(4): hit information in the top 4 channels of the respective patch.
C(5)-C(8): hit information in the bottom 4 channels of the respective patch.
C(16): buffer busy output {when the no.of words in the Pattern-buffer is higher than a user-specified number}
rest all pins (currently) carry logic-0
The F-port set to receives NIM input signals
F(0)(physically bottom): the helicity information signal. (!check) F(1: the accumulation trigger from Master board. F(2)-F(7): floating
The G-port set for receiving NIM input signals
G(0): Global Clock generated by the Master board G(1): event-trigger from TS (level-1-accept for the master-board generated event-trigger)
Master board
The signals from patch1(slave-1) and patch2(slave-2) will be ported to A-port of the master board.
0th pin : if patch1 in the detector planes independently got a good trigger 1-4 pins : the hit-information in the top most strip of patch1 in planes 1-4 respectively. 5-8 pins : the hit-information in the bottom most strip of patch1 in planes 1-4 respectively 9-22 pins : floating 16th pin : if patch2 in the detector planes independently got a good trigger. 17-20 pins: the hit-information in the top most strip of patch2 in planes 1-4 respectively. 21-24 pins: the hit-information in the bottom most strip of patch2 in planes 1-4 respectively
The signal cluster from patch3(slave-3) will be ported to B-port of the master board where
0th pin : if patch3 in the detector planes independently got a good trigger 1-4 pins : the hit-information in the top most strip of patch3 in planes 1-4 respectively. 5-8 pins : the hit-information in the bottom most strip of patch3 in planes 1-4 respectively Rest all pins are floating
The C-port is a fixed output port and is currently unused.
The E-port is used as an input port for following NIM signals:
pin 0 (physically top): MPS input from Injector Helicity Board or TS. pin 1-7 : floating.
The F-port is used as an output port for following NIM signals:
pin 0(physical top): Global clock, output to the G(0) port of s1 pin 1: Global clock, output to the G(0) port of s2 pin 2: Global clock, output to the G(0) port of s3 pin 3: Hit trigger for Accumulator going to s1 pin 4: Hit trigger for Accumulator going to s2 pin 5: Hit trigger for Accumulator going to s3 pin 6: logic-0 (unused) pin 7(physical bottom): carrying logic-0 (unused)
The G-port is used as NIM output:
pin 0(physical left): MPS (Latch) signal going to the TS pin 1(physical right): Hit trigger for Event-mode going to TS
