View source for Pin Plan of v1495

Note: Please go through the [[Nomenclature_Conventions | nomenclature conventions]] to follow this section clearly. 

While programming the firmware, the Pin plan has been assumed. All signals unless otherwise specified are LVDS. 

==== Slave board ====
'''Slave-1:'''
The A, B, D and E ports take LVDS, 32 bit input signal information from the top 32 strips of planes 1, 2, 3 and 4 respectively.

Pin 1 is indicated by a white arrow on the port of v1495. The pattern in which signals are given into the pins are as follows:
  
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #: DD strip #
! pin #: DD strip #
|-
| A(32): strip 32 
| A(16): strip 31
|-
| A(31): strip 30 
| A(15): strip 29
|-
| A(30): strip 28 
| A(14): strip 27
|-
| A(29): strip 26 
| A(13): strip 25
|-
| A(28): strip 24 
| A(12): strip 23
|-
| A(27): strip 22 
| A(11): strip 21
|-
| A(26): strip 20 
| A(10): strip 19
|-
| A(25): strip 18 
| A(9): strip 17
|-
| A(24): strip 16 
| A(8): strip 15
|-
| A(23): strip 14 
| A(7): strip 13
|-
| A(22): strip 12
| A(6): strip 11
|-
| A(21): strip 10
| A(5): strip 9
|-
| A(20): strip 8 
| A(4): strip 7
|-
| A(19): strip 6 
| A(3): strip 5
|-
| A(18): strip 4 
| A(2): strip 3
|-
| A(16): strip 2 
| A(1): strip 1
|}

The B, D and E follow the exact same pattern as A port. 

----

The C-port outputs to Master board the following signals
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
| C(31)-C(16)
| unused, carrying logic-0
|-
| C(15)
| buffer is Full
|-
| C(14)-C(10)
| unused, carrying logic-0
|-
| C(9)
| accumulation pre-trigger in this slave
|-
| C(8)-C(5)
| hit information of bottom 4 channels
|-
| C(4)-C(1)
| hit information of top 4 channels
|-
| C(0)
| event pre-trigger in this slave
|}

----

The F-port is set to receives NIM based input signals(originated from TS)
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
| F(7)-F(3)
| unused
|-
| F(2)
| Event mode trigger
|-
| F(1)
| Accumulation mode trigger
|-
| F(0)
| Helicity
|}


----

The G-port set for receiving NIM input signals (originated from Master v1495)
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|G(1)
|MPS
|-
|G(0)
|Global Clock
|}

==== Master board ====

The signals from [[Nomenclature_Conventions | patch1]](slave-1) will be ported to '''A-port''' of the master board.
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|A(0)
|independent event trigger in strips 1-32
|-
|A(1)
|OR of strips 1-4 on plane 1
|-
|A(2)
|OR of strips 1-4 on plane 2
|-
|A(3)
|OR of strips 1-4 on plane 3
|-
|A(4)
|OR of strips 1-4 on plane 4
|-
|A(5)
|OR of strips 28-32 on plane 1
|-
|A(6)
|OR of strips 28-32 on plane 2
|-
|A(7)
|OR of strips 28-32 on plane 3
|-
|A(8)
|OR of strips 28-32 on plane 4
|-
|A(9)
|independent accumulation trigger in strips 1-32
|-
|A(15)
|buffer of slave-1 busy(half-full)
|}

----

The signals from [[Nomenclature_Conventions | patch2]](slave-2) will be ported to '''B-port''' of the master board.
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|B(0)
|independent event trigger in strips 33-64
|-
|B(1)
|OR of strips 33-36 on plane 1
|-
|B(2)
|OR of strips 33-36 on plane 2
|-
|B(3)
|OR of strips 33-36 on plane 3
|-
|B(4)
|OR of strips 33-36 on plane 4
|-
|B(5)
|OR of strips 61-64 on plane 1
|-
|B(6)
|OR of strips 61-64 on plane 2
|-
|B(7)
|OR of strips 61-64 on plane 3
|-
|B(8)
|OR of strips 61-64 on plane 4
|-
|B(9)
|independent accumulation trigger in strips 33-64
|-
|B(15)
|buffer of slave-2 busy(half-full)
|}

----

The signals from [[Nomenclature_Conventions | patch3]](slave-3) will be ported to '''D-port''' of the master board.
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|D(0)
|independent event trigger in strips 65-96
|-
|D(1)
|OR of strips 65-68 on plane 1
|-
|D(2)
|OR of strips 65-68 on plane 2
|-
|D(3)
|OR of strips 65-68 on plane 3
|-
|D(4)
|OR of strips 65-68 on plane 4
|-
|D(5)
|OR of strips 93-96 on plane 1
|-
|D(6)
|OR of strips 93-96 on plane 2
|-
|D(7)
|OR of strips 93-96 on plane 3
|-
|D(8)
|OR of strips 93-96 on plane 4
|-
|D(9)
|independent accumulation trigger in strips 65-96
|-
|D(15)
|buffer of slave-3 busy(half-full)
|}

Rest all pins are floating

----

The C-port is a fixed output port and is currently unused.

----

The '''E-port''' is used as an input port for following NIM signals: 
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|E(0)
|Latch
|}

----

The '''F-port''' is used as an output port for following NIM signals:
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|F(7)
|slave-1 buffer busy
|-
|F(6)
|slave-2 buffer busy
|-
|F(5)
|slave-3 buffer busy
|-
|F(4)
|global clock
|-
|F(3)
|global clock
|-
|F(2)
|global clock
|-
|F(1)
|global clock
|-
|F(0)
|global clock
|}

----

The '''G-port''' is used as an output port for following NIM signals:
{| style="color:maroon; background-color:#ffffff;" cellpadding="10" cellspacing="0" border="1"
! pin #
! corresponding signal
|-
|G(0)
|final Accumulation Trigger
|-
|G(1)
|final Event Trigger
|}