Hall A ROOT/C++ Analyzer (podd)
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F1TDCModule.cxx
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1
2//
3// F1TDCModule
4// JLab F1 TDC Module
5//
7
8#include "F1TDCModule.h"
9#include "VmeModule.h"
10#include "THaEvData.h"
11#include "TMath.h"
12#include <iostream>
13
14using namespace std;
15
16namespace Decoder {
17
18 const Int_t NTDCCHAN = 32;
19 const Int_t MAXHIT = 100;
20
22 DoRegister( ModuleType( "Decoder::F1TDCModule" , 3201 ));
23
25 VmeModule(crate, slot), fNumHits(0), fResol(ILO),
26 fTdcData(NTDCCHAN*MAXHIT),
27 IsInit(false), slotmask(0), chanmask(0), datamask(0)
28{
30}
31
34 fTdcData.resize(NTDCCHAN*MAXHIT);
35 Clear();
36 IsInit = true;
37 fName = "F1 TDC 3201";
38 fNumChan = 32;
39 fWdcntMask=0;
41 if (fModelNum == 6401) SetResolution(0);
42}
43
44
46{
47 if (fDebugFile)
48 *fDebugFile << "is F1TDC slot ? "<<hex<<fHeader
49 <<" "<<fHeaderMask<<" "<<rdata<<dec<<endl;
50 return ((rdata != 0xffffffff) & ((rdata & fHeaderMask)==fHeader));
51}
52
54{
55 UInt_t idx = chan*MAXHIT + hit;
56 if( idx > MAXHIT * NTDCCHAN ) return 0;
57 return fTdcData[idx];
58}
59
62 fNumHits = 0;
63 fTdcData.assign(NTDCCHAN*MAXHIT,0);
64}
65
67 const UInt_t *pstop ) {
68// this increments evbuffer
69 if (fDebugFile) *fDebugFile << "F1TDCModule:: loadslot "<<endl;
70 fWordsSeen = 0;
71
72 // CAUTION: this routine re-numbers the channels
73 // compared to the labelled numbering scheme on the board itself.
74 // According to the labelling and internal numbering scheme,
75 // the F1 module has odd numbered channels on one connector
76 // and even numbered channels on the other.
77 // However we usually put neighboring blocks/wires into the same
78 // cable, connector etc.
79 // => hana therefore uses a numbering scheme different from the module
80 //
81 // In normal resolution mode, the scheme is:
82 // connector 1: ch 0 - 15
83 // connector 2: ch 16 - 31
84 // connector 33: ch 32 - 47
85 // connector 34: ch 48 - 63
86 //
87 // In high-resolution mode, only two connectors are used since
88 // two adjacent channels are internally combined and read out as the
89 // internally-even numbered channels.
90 // this is kind of inconvenient for the rest of the software
91 // => hana therefore uses a numbering scheme different from the module
92 // connector 1: unused
93 // connector 2: ch 0 - 15
94 // connector 33: unused
95 // connector 34: ch 16 - 31
96 //
97 // In both modes:
98 // it is assumed that we only get data from one single trigger
99 // if the F1 is run in multiblock mode (buffered mode)
100 // this might not be the case anymore - but this will be interesting anyhow
101 // triggertime and eventnumber are not yet read out, they will again
102 // be useful when multiblock mode (buffered mode) is used
103
104 const UInt_t F1_HIT_OFLW = BIT(24); // bad
105 const UInt_t F1_OUT_OFLW = BIT(25); // bad
106 const UInt_t F1_RES_LOCK = BIT(26); // good
107 const UInt_t DATA_CHK = F1_HIT_OFLW | F1_OUT_OFLW | F1_RES_LOCK;
108 const UInt_t DATA_MARKER = BIT(23);
109 // look at all the data
110 const UInt_t *loc = evbuffer;
111#ifdef WITH_DEBUG
112 if(fDebug > 1 && fDebugFile)
113 *fDebugFile<< "Debug of F1TDC data, fResol = "<<fResol<<" model num "<<fModelNum<<endl;
114#endif
115 while ( loc <= pstop && IsSlot(*loc) ) {
116 if ( !( (*loc) & DATA_MARKER ) ) {
117 // header/trailer word, to be ignored
118#ifdef WITH_DEBUG
119 if(fDebug > 1 && fDebugFile)
120 *fDebugFile<< "[" << (loc-evbuffer) << "] header/trailer 0x"
121 <<hex<<*loc<<dec<<endl;
122#endif
123 } else {
124 UInt_t chan = ((*loc) >> 16) & 0x3f; // internal channel number
125#ifdef WITH_DEBUG
126 UInt_t chn = chan; // save original for debug message below
127 if (fDebug > 1 && fDebugFile)
128 *fDebugFile<< "[" << (loc-evbuffer) << "] data 0x"
129 <<hex<<*loc<<dec<<endl;
130#endif
131 if( IsHiResolution() ) {
132 // drop last bit for channel renumbering
133 chan >>= 1;
134 } else {
135 // do the reordering of the channels, for contiguous groups
136 // odd numbered TDC channels from the board -> +16
137 chan = (chan & 0x20) + ((chan & 0x01) << 4) + ((chan & 0x1e) >> 1);
138 }
139 //FIXME: cross-check slot number here
140 if( ((*loc) & DATA_CHK) != F1_RES_LOCK ) {
141 UInt_t f1slot = ((*loc) & 0xf8000000) >> 27;
142 cout << "\tWarning: F1 TDC " << hex << (*loc) << dec;
143 cout << "\tSlot (Ch) = " << f1slot << "(" << chan << ")";
144 if( (*loc) & F1_HIT_OFLW ) {
145 cout << "\tHit-FIFO overflow";
146 }
147 if( (*loc) & F1_OUT_OFLW ) {
148 cout << "\tOutput FIFO overflow";
149 }
150 if( !((*loc) & F1_RES_LOCK) ) {
151 cout << "\tResolution lock failure!";
152 }
153 cout << endl;
154 }
155
156 UInt_t raw = (*loc) & 0xffff;
157#ifdef WITH_DEBUG
158 if(fDebug > 1 && fDebugFile) {
159 *fDebugFile<<" int_chn chan data "<<dec<<chn<<" "<<chan
160 <<" 0x"<<hex<<raw<<dec<<endl;
161 }
162#endif
163 /*Int_t status = */sldat->loadData("tdc",chan,raw,raw);
164 UInt_t idx = chan * MAXHIT + 0; // 1 hit per chan ???
165 if( idx < MAXHIT * NTDCCHAN ) fTdcData[idx] = raw;
166 fWordsSeen++;
167 }
168 loc++;
169 }
170
171 return fWordsSeen;
172}
173
174}
175
int Int_t
unsigned int UInt_t
uint32_t chan
bool Bool_t
const char Option_t
#define BIT(n)
Bool_t IsHiResolution() const
Definition F1TDCModule.h:40
UInt_t LoadSlot(THaSlotData *sldat, const UInt_t *evbuffer, const UInt_t *pstop)
virtual void Clear(Option_t *opt="")
virtual void Init()
std::vector< UInt_t > fTdcData
Definition F1TDCModule.h:52
virtual Bool_t IsSlot(UInt_t rdata)
void SetResolution(Int_t which=0)
Definition F1TDCModule.h:36
virtual UInt_t GetData(UInt_t chan, UInt_t hit) const
static TypeIter_t fgThisType
Definition F1TDCModule.h:56
UInt_t fNumChan
Definition Module.h:148
virtual void Init()
Definition Module.cxx:51
std::ofstream * fDebugFile
Definition Module.h:156
UInt_t fWdcntMask
Definition Module.h:146
Int_t fModelNum
Definition Module.h:147
UInt_t fHeader
Definition Module.h:143
UInt_t fHeaderMask
Definition Module.h:143
UInt_t fWordsSeen
Definition Module.h:145
TypeSet_t::iterator TypeIter_t
Definition Module.h:40
Int_t loadData(const char *type, UInt_t chan, UInt_t dat, UInt_t raw)
TString fName
void Clear(Option_t *option="") override
const UInt_t MAXHIT
const UInt_t NTDCCHAN
STL namespace.
ClassImp(TPyArg)